AT27C080

2

The AT27C080 is available in a choice of packages, includ-

ing; one-time programmable (OTP) plastic PLCC, PDIP,

SOIC (SOP), and TSOP, as well as windowed ceramic

Cerdip. All devices feature two-line control (CE, OE) to give

designers the flexibility to prevent bus contention.

With h igh dens ity 1M byte s torage capabi lity, the

AT27C080 allows firmware to be stored reliably and to be

accessed by the system without the delays of mass storage

media.

Atmel’s 27C080 has additional features to ensure high

quality and efficient production use. The Rapid

ming Algorithm reduces the time required to program the

part and guarantees reliable programming. Programming

time is typically only 50

µs/byte. The Integrated Product

Identification Code electronically identifies the device and

manufacturer. This feature is used by industry standard

programming equipment to select the proper programming

algorithms and voltages.

Erasure Characteristics

The entire memory array of the AT27C080 is erased (all

outputs read as V

wavelength of 2,537Å. Complete erasure is assured after a

minimum of 20 minutes of exposure using 12,000

intensity lamps spaced one inch away from the chip. Mini-

mum erase time for lamps at other intensity ratings can be

calculated from the minimum integrated erasure dose of 15

W.sec/cm

label is recommended to cover the clear window on any UV

erasable EPROM that will be subjected to continuous

flourescent indoor lighting or sunlight.

System Considerations

Switching between active and standby conditions via the

Chip Enable pin may produce transient voltage excursions.

Unless accommodated by the system design, these tran-

sients may exceed data sheet limits, resulting in device

non-conformance. At a minimum, a 0.1

µF high frequency,

low inherent inductance, ceramic capacitor should be uti-

lized for each device. This capacitor should be connected

between the V

close to the device as possible. Additionally, to stabilize the

supply voltage level on printed circuit boards with large

EPROM arrays, a 4.7

µF bulk electrolytic capacitor should

terminals. This capacitor should be positioned as close as

possible to the point where the power supply is connected

to the array.