SSM2018

Data Sheet

Rev. C | Page 12 of 16

APPLICATIONS INFORMATION

The SSM2018 is a trimless voltage controlled amplifier (VCA) for

volume control in audio systems. The SSM2018 is identical to

the original SSM2018 in functionality and pinout; however, it is

the first professional quality audio VCA in the marketplace that

does not require an external trimming potentiometer to minimize

distortion. Instead, the SSM2018 is laser trimmed before it is

packaged to ensure the specified THD and control feedthrough

performance. This has a significant savings in not only the cost of

external trimming potentiometers, but also the manufacturing cost

of performing the trimming optimization during production.

BASIC VCA CONFIGURATION

The primary application circuit for the SSM2018 is the basic

VCA configuration, which is shown in Figure 29. This configura-

tion uses differential current feedback to realize the VCA. A

complete description of the internal circuitry of the VCA, and this

configuration, is given in the Theory of Operation section. The

SSM2018 is trimmed at the factory for operation in the basic

VCA configuration with class AB biasing. Thus, for optimal

distortion and control feedthrough performance, use the same

configuration and biasing. All of the graphs for the SSM2018 in

the data sheet have been measured using the circuit of Figure 29.

Figure 29. Basic VCA Application Circuit

In the simple VCA configuration, the SSM2018 inputs are at a

virtual ground. Thus, 18 kΩ resistors are required to convert the

input voltages to input currents. The schematic also shows ac

coupling capacitors. These are inserted to minimize dc offsets

generated by bias current through the resistors. Without the

capacitors, the dc offset due to the input bias current is typically

5 mV. The input stage has the flexibility to run either inverting,

noninverting, or balanced. The most common configuration is

to run it in the noninverting single-ended mode. If either input

is unused, the associated 18 kΩ resistor and coupling capacitor

should be removed to prevent any additional noise.

The common-mode rejection in balanced mode is typically

55 dB up to 1 kHz, decreasing at higher frequencies as shown in

Figure 25. To ensure good CMRR in the balanced configuration,

the input resistors must be balanced. For example, a 1% mismatch

results in a CMRR of 40 dB. To achieve 55 dB, these resistors

should have an absolute tolerance match of 0.1%.

The output of the basic VCA is taken from Pin 14, which is the

output of an internal amplifier. Note that the second voltage

output (Pin 16) is connected to the negative supply. This is

normal and actually disables that output amplifier, ensuring

that it does not oscillate and cause interference problems.

Shorting the output to the negative supply does not cause the

supply current to increase. This amplifier is only used in the

OVCE application explained in the Operational Voltage

Controlled Element section.

The control port follows a −30 mV/dB control law. The application

circuit shows a 3 kΩ and 1 kΩ resistor divider from a control

voltage. The choice of these resistors is arbitrary and could be

any values to properly scale the control voltage. In fact, these

resistors can be omitted if the control voltage has been properly

scaled. The 1 μF capacitor is in place to provide some filtering

of the control signal. Although the control feedthrough is

trimmed at the factory, the feedthrough increases with frequency

(Figure 20). Thus, high frequency noise can feed through and

add to the noise of the VCA. Filtering the control signal helps

minimize this noise source.

PROPER OPERATING MODE FOR THE SSM2018

The SSM2018 has the flexibility of operating in either Class A

or Class AB. This is accomplished by adjusting the amount of

trade-off between the two classes is that Class A tends to have

lower THD but higher noise than Class AB. However, by using

well matched gain core transistors, distortion compensation

circuitry and laser trimming, the SSM2018 has excellent THD

performance in Class AB. Thus, it offers the best of both worlds

in having the low noise of Class AB with low THD.

Because the SSM2018 operates optimally in Class AB, the

distortion trim is performed for this class. To guarantee

conformance to the data sheet THD specifications, the SSM2018

must be operated in class AB. This does not mean that it can

not be operated in Class A, but the optimal THD trim point is

different for the two classes. Using Class A operation results to

0.05% without trim. An external potentiometer could be added

to change the trim back to its optimal point as shown in the

OVCE application circuit, but this adds the expense and time in

adjusting a potentiometer.

MODE input (Pin 12). For class AB operation with ±15 V supplies,

remains at 95 μA. This current follows the formula:

B

CC

MODE

R

V

I

V)

7

.

0

(





(3)

The factor of 0.7 V arises from the fact that the dc bias on Pin

12 is a diode drop above ground.

1

V+

2

3

4

1µF 18kΩ

18kΩ

150kΩ

50pF

47pF

18kΩ

3kΩ

1kΩ

1µF

1µF

16

15

14

13

5

6

7

12

11

V–

V+

10

8

9

SSM2018T