REV. B

–9–

SSM2018T

A4

Q3

Q4

Q1

Q2

200

1–G

G

G

1–G

200

1.8k

GAIN

CORE

COMP 1

COMPENSATION

NETWORK

Im

SPLITTER

A1

A3

BAL

GND

MODE

COMP 3

COMP 2

V+

V–

+IN

–IN

A2

A4

Im + (

)

Is

2

Im – (

)

Is

2

Figure 2. SSM2018T Detailed Functional Diagram

shown later in the data sheet. Thus, for the Basic VCA circuit

or the OVCE circuit, COMP3 should be left open.

A compensation capacitor does need to be added between

COMP1 and COMP2. Because the VCA operates over such a

wide gain range, the compensation should ideally be optimized

for each gain. When the VCA is in high attenuation, there is

very high “loop gain,” and the part needs to have high compen-

sation. On the other hand, at high gain, the same compensation

capacitor would overcompensate the part and roll off the high

frequency performance. Thus, the SSM2018T employs a patented

adaptive compensation circuit. The compensation capacitor is

“Miller” connected between the base and collector of an inter-

nal transistor. By changing the gain of this transistor via the

control voltage, the compensation is changed.

Increasing the compensation capacitor causes the frequency

response and slew rate to decrease, which tends to cause high

frequency distortion to increase. For the basic VCA circuit, 47

pF was chosen as the optimal value. The OVCE circuit described

later uses a 220 pF capacitor. The reason for the increase is to

compensate for the extra phase shift from the additional output

amplifier used in the OVCE configuration. The compensation

capacitor can be adjusted over a practical range from 47 pF to

220 pF if desired. Below 47 pF, the parts may oscillate; above

220 pF the frequency response is significantly degraded.

Control Section

As noted above, the control voltage on Pin 11 steers the current

through the gain core transistors to set the gain. The unity gain

VCA for positive voltages (0 V to 3 V, typ), and gain occurs for

negative voltage (0 V to –1.3 V, typ). From –1.3 V to

+3.0 V, 140 dB of gain range is obtainable. The output gain

formula is as follows:

V

(–aV

(1)

The exponential term arises from the standard Ebers-Moll

equation describing the relationship of a transistor’s collector

current as a function of the base-emitter voltage:

(2)

due to the resistor divider of the 200

W and 1.8 kW resistors

shown in Figure 2. The resulting expression for “a” is as follows:

a = 1/(10

¥ V

temperature. Substituting a = 4 in the above equation results in

a –28.8 mV/dB control law at room temperature.

The –28.8 mV/dB number is slightly different from the data

sheet specification of –30 mV/dB. The difference arises from

is known as the thermal voltage, and it has a direct dependency

1.38E–23, q = electron charge = 1.6E–19, and T = absolute

temperature in Kelvin). This temperature dependency leads to

the –3500 ppm/

∞C drift of the control law. It also means that the

control law changes as the part warms up. Thus, our specifica-

tion for the control law states that the part has been powered up

for 60 seconds.

When the part is initially turned on, the temperature of the die

is still at the ambient temperature (25

∞C for example), but the

power dissipation causes the die to warm up. With

±15 V supplies

and a supply current of 11 mA, 330 mW is dissipated. This

number is multiplied by

q

temperature. In this case, the die increases from 25

∞C to approxi-

mately 50

∞C. A 25∞C temperature change causes a 8.25%

increase in the gain constant, resulting in a gain constant of 30

mV/dB. The graph in Figure 17 shows how the gain constant

varies over the full temperature range.