ATF1502AS

2

44-Lead TQFP/PQFP

Top View

44-Lead PLCC

Top View

Description

The ATF1502AS is a high performance, high density Com-

plex Programmable Logic Device (CPLD) which utilizes

Atmel’s proven electrically erasable technology. With 32

logic macrocells and up to 36 inputs, it easily integrates

logic from several TTL, SSI,MSI, LSI and classic PLDs.

The ATF1502AS’s enhanced routing switch matrices

increase usable gate count, and the odds of successful pin-

locked design modifications.

The ATF1502AS has up to 32 bi-directional I/O pins and 4

dedicated input pins, depending on the type of device pack-

age selected. Each dedicated pin can also serve as a glo-

bal control signal; register clock, register reset or output

enable. Each of these control signals can be selected for

use individually within each macrocell.

Block Diagram

Each of the 32 macrocells generates a buried feedback,

which goes to the global bus. Each input and I/O pin also

feeds into the global bus. The switch matrix in each logic

block then selects 40 individual signals from the global bus.

1

2

3

4

5

6

7

8

9

10

11

33

32

31

30

29

28

27

26

25

24

23

I/O/TDI

I/O

I/O

GND

PD1/I/O

I/O

TMS/I/O

I/O

VCC

I/O

I/O

I/O

I/O/TDO

I/O

I/O

VCC

I/O

I/O

I/O/TCK

I/O

GND

I/O

7

8

9

10

11

12

13

14

15

16

17

39

38

37

36

35

34

33

32

31

30

29

TDI/I/O

I/O

I/O

GND

PD1/I/O

I/O

I/O/TMS

I/O

VCC

I/O

I/O

I/O

I/O/TDO

I/O

I/O

VCC

I/O

I/O

I/O/TCK

I/O

GND

I/O

B

32