I2CSTAT datasheet(55/210 Pages) MICROCHIP

55 / 210 page

DS70139G-page 55

dsPIC30F2011/2012/3012/3013

6.0

DATA EEPROM MEMORY

The data EEPROM memory is readable and writable

during normal operation over the entire VDD range. The

data EEPROM memory is directly mapped in the

program memory address space.

The four SFRs used to read and write the program

Flash memory are used to access data EEPROM

memory, as well. As described in Section 5.5 “Control

Registers”, these registers are:

•NVMCON

• NVMADR

• NVMADRU

• NVMKEY

The EEPROM data memory allows read and write of

single words and 16-word blocks. When interfacing to

data memory, NVMADR, in conjunction with the

NVMADRU

are

used

address

the

EEPROM location being accessed. TBLRDL and

TBLWTL

instructions are used to read and write data

EEPROM. The dsPIC30F devices have up to 8 Kbytes

(4K words) of data EEPROM with an address range

from 0x7FF000 to 0x7FFFFE.

A word write operation should be preceded by an erase

of the corresponding memory location(s). The write

typically requires 2 ms to complete, but the write time

varies with voltage and temperature.

A program or erase operation on the data EEPROM

does not stop the instruction flow. The user is

responsible for waiting for the appropriate duration of

time before initiating another data EEPROM write/

erase operation. Attempting to read the data EEPROM

while a programming or erase operation is in progress

results in unspecified data.

Control bit WR initiates write operations similar to

program Flash writes. This bit cannot be cleared, only

set, in software. They are cleared in hardware at the

completion of the write operation. The inability to clear

the WR bit in software prevents the accidental or

premature termination of a write operation.

The WREN bit, when set, allows a write operation. On

power-up, the WREN bit is clear. The WRERR bit is set

when a write operation is interrupted by a MCLR Reset

or a WDT Time-out Reset during normal operation. In

these situations, following Reset, the user can check

the WRERR bit and rewrite the location. The address

6.1

Reading the Data EEPROM

A TBLRD instruction reads a word at the current

program word address. This example uses W0 as a

pointer to data EEPROM. The result is placed in

EXAMPLE 6-1:

DATA EEPROM READ

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals,

descriptions

and

general device functionality, refer to the

“dsPIC30F Family Reference Manual”

(DS70046). For more information on the

device instruction set and programming,

refer to the “16-bit MCU and DSC

Programmer’s

Reference

Manual”

(DS70157).

Note:

Interrupt flag bit NVMIF in the IFS0

must be cleared in software.

MOV

#LOW_ADDR_WORD,W0

; Init Pointer

MOV

#HIGH_ADDR_WORD,W1

MOV

W1,TBLPAG

TBLRDL

[ W0 ], W4

; read data EEPROM

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