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I2CSTAT 数据表(PDF) 161 Page - Microchip Technology |
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I2CSTAT 数据表(HTML) 161 Page - Microchip Technology |
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161 / 210 page  © 2010 Microchip Technology Inc. DS70139G-page 161 dsPIC30F2011/2012/3012/3013 TABLE 20-14: EXTERNAL CLOCK TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.5V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤TA ≤+85°C for Industrial -40°C ≤TA ≤+125°C for Extended Param No. Symbol Characteristic Min Typ(1) Max Units Conditions OS10 FOSC External CLKN Frequency(2) (External clocks allowed only in EC mode) DC 4 4 4 — — — — 40 10 10 7.5 MHz MHz MHz MHz EC EC with 4x PLL EC with 8x PLL EC with 16x PLL Oscillator Frequency(2) DC 0.4 4 4 4 4 10 10 10 10 12 12 12 31 — — — — — — — — — — — — — — — — — — — 7.37 7.37 7.37 7.37 512 4 4 10 10 10 7.5 25 20 20 15 25 25 22.5 33 — — — — — MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz kHz MHz MHz MHz MHz kHz RC XTL XT XT with 4x PLL XT with 8x PLL XT with 16x PLL HS HS/2 with 4x PLL HS/2 with 8x PLL HS/2 with 16x PLL HS/3 with 4x PLL HS/3 with 8x PLL HS/3 with 16x PLL LP FRC internal FRC internal w/4x PLL FRC internal w/8x PLL FRC internal w/16x PLL LPRC internal OS20 TOSC TOSC = 1/FOSC — — — — See parameter OS10 for FOSC value OS25 TCY Instruction Cycle Time(2)(3) 33 — DC ns See Table 20-17 OS30 TosL, TosH External Clock(2) in (OSC1) High or Low Time .45 x TOSC —— ns EC OS31 TosR, TosF External Clock(2) in (OSC1) Rise or Fall Time — — 20 ns EC OS40 TckR CLKO Rise Time(2)(4) — — — ns See parameter DO31 OS41 TckF CLKO Fall Time(2)(4) — — — ns See parameter DO32 Note 1: Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 2: These parameters are characterized but not tested in manufacturing. 3: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “Max.” cycle time limit is “DC” (no clock) for all devices. 4: Measurements are taken in EC or ERC modes. The CLKO signal is measured on the OSC2 pin. CLKO is low for the Q1-Q2 period (1/2 TCY) and high for the Q3-Q4 period (1/2 TCY). |
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