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CMPWR130ST 数据表(PDF) 3 Page - California Micro Devices Corp |
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CMPWR130ST 数据表(HTML) 3 Page - California Micro Devices Corp |
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3 / 6 page ![]() 3/5/2001 3 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com CMPWR130 CALIFORNIA MICRO DEVICES © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corp Interface Signals V CC is the power source for the internal regulator and is monitored continuously by an internal controller circuit. Whenever V CC exceeds VCCSEL (4.30V TYP), the internal regulator (300mA MAX) will be enabled and deliver a fixed 3.3V at V OUT. When VCC falls below VCCDES (4.10V TYP) the regulator will be disabled. Internal loading on this pin is typically 0.6mA when the regulator is enabled, which reduces to 0.2mA whenever the regulator is disabled. If V CC falls below the voltage on the V OUT pin the VCC loading will further reduce to only a few microamperes. During a V CC power up sequence, there will be an effective step increase in V CC line current when the regulator is enabled. The amplitude of this step increase will depend on the DC load current and any necessary current required for charging/discharging the load capacitance. This line current transient will cause a voltage disturbance at the V CC pin. The magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the V CC input. To prevent chatter during Select and Deselect transi- tions, a built-in hysteresis voltage of 200mV has been incorporated. It is recommended that the power supply connected to the V CC input should have a source resis- tance of less than 0.25 Ω to minimize the event of chatter during the enabling/disabling of the regulator. An input filter capacitor in close proximity to the V CC pin will reduce the effective source impedance and help minimize any disturbances. If the V CC pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor in the range of 1µF to 10µF will ensure adequate filtering. GND is the negative reference for all voltages. This current that flows in the ground connection is very low (TYP 550µA) and has minimal variation over all load conditions. V OUT is the regulator output voltage connection used to power the load. An output capacitor of 4.7µF is used to provide the necessary phase compensation, thereby preventing oscillation. The capacitor also helps to minimize the peak output disturbance during power supply changeover. When V CC falls below VOUT, then VOUT will be used to provide the necessary quiescent current for the internal reference circuits. This ensures excellent start-up characteristics for the regulator. DRIVE is an active LOW logic output intended to be used as the control signal for driving an external PFET whenever the regulator is disabled. This will allow the voltage at V OUT to be powered from an auxiliary supply voltage (3.3V). The Drive pin is pulled HIGH to V CC whenever the regulator is enabled, this ensures the auxiliary remains isolated during normal regulator operation. The output current sinking ability of this logic signal is equivalent to a 100W resistor. The current sourcing ability is equivalent to a 4k Ω resistor. NC pins are electrically isolated from the internal circuitry. These pins can be connected to any external voltage level without impacting the device functionality. PIN FUNCTIONS Pin Symbol Description 1 VCC Positive (5V) supply input for regulator. (VCC > VCCSEL) 6, 7 VOUT Continuous output voltage (3.3V) is derived from either the internal regulator or low impedance switch connected to the auxiliary supply input. 8 DRIVE Output drive signal to control external MOSFET switch 4 GND Negative reference for all voltages 2, 3, 5 NC Unconnected pin which is electrically isolated from internal circuitry. VOUT 3.3V 300mA VREF 3.3V + – VCC + – VDESELECT 4.1V GND DRIVE ENABLE Simplified Electrical Schematic |
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