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L6924UTR 数据表(PDF) 15 Page - STMicroelectronics |
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L6924UTR 数据表(HTML) 15 Page - STMicroelectronics |
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15 / 37 page ![]() L6924U Operation description Doc ID 14716 Rev 2 15/37 Where ΔV MOS is given by: Equation 3 Where, ILIM = current limit of the wall adapter, and RDS(on) = resistance of the power MOSFET. The difference between the programmed charge current and the adapter limit should be high enough to minimize the RDS(on) value (and the power dissipation). This makes the control loop completely unbalanced and the power element is fully turned on. Figure 8 shows the RDS(on) values for different output voltages and charging currents for an adapter current limit of 500 mA. Figure 8. RDS(on) curves vs. charging current and output voltage Neglecting the voltage drop across the charger ( ΔV MOS) when the device operates in this condition, its input voltage is equal to the battery one, and so a very low operating input voltage (down to 2.5 V) is required. The power dissipated by the device during this phase is: Equation 4 When the battery voltage approaches the final value, the charger gets back the control of the current, reducing it. Due to this, the upstream adapter exits the current limit condition and its output goes up to the regulated voltage VADP. This is the worst case in power dissipation: I R V LIM ) ON ( DS MOS × = Δ 2 LIM ) on ( DS CH I R P × = |
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