AD8229

Data Sheet

Rev. B | Page 18 of 24

For best performance, source impedance to the REF terminal

should be kept well below 1 Ω. As shown in Figure 56, the

reference terminal, REF, is at one end of a 5 kΩ resistor.

Additional impedance at the REF terminal adds to this 5 kΩ

resistor and results in amplification of the signal connected to

can be calculated as follows:

Only the positive signal path is amplified; the negative path

is unaffected. This uneven amplification degrades CMRR.

INCORRECT

V

CORRECT

AD8229

OP1177

+

–

V

REF

AD8229

REF

Figure 57. Driving the Reference Pin

INPUT VOLTAGE RANGE

Figure 11 through Figure 16 show the allowable common-mode

input voltage ranges for various output voltages and supply

voltages. The 3-op-amp architecture of the AD8229 applies gain

in the first stage before removing common-mode voltage with

the difference amplifier stage. Internal nodes between the first and

second stages (Node 1 and Node 2 in Figure 56) experience a

combination of a gained signal, a common-mode signal, and a

diode drop. This combined signal can be limited by the voltage

supplies even when the individual input and output signals are

not limited.

LAYOUT

To ensure optimum performance of the AD8229 at the PCB

level, care must be taken in the design of the board layout. The

pins of the AD8229 are arranged in a logical manner to aid in

this task.

8

7

6

5

1

2

3

4

–IN

REF

+IN

TOP VIEW

(Not to Scale)

AD8229

Figure 58. Pinout Diagram

Common-Mode Rejection Ratio over Frequency

Poor layout can cause some of the common-mode signals to be

converted to differential signals before reaching the in-amp.

Such conversions occur when one input path has a frequency

response that is different from the other. To keep CMRR over

frequency high, the input source impedance and capacitance of

each path should be closely matched. Additional source resistance

in the input path (for example, for input protection) should be

placed close to the in-amp inputs, which minimizes their

interaction with parasitic capacitance from the PCB traces.

Parasitic capacitance at the gain setting pins can also affect CMRR

over frequency. If the board design has a component at the gain

setting pins (for example, a switch or jumper), the component

should be chosen so that the parasitic capacitance is as small as

possible.

Power Supplies

A stable dc voltage should be used to power the instrumentation

amplifier. Noise on the supply pins can adversely affect perfor-

mance. See the PSRR performance curves in Figure 18 and

Figure 19 for more information.

A 0.1 μF capacitor should be placed as close as possible to each

supply pin. As shown in Figure 59, a 10 μF tantalum capacitor

can be used farther away from the part. In most cases, it can be

shared by other precision integrated circuits.

AD8229

+IN

–IN

LOAD

REF

0.1µF

10µF

0.1µF

10µF

Figure 59. Supply Decoupling, REF, and Output Referred to Local Ground

Reference Pin

The output voltage of the AD8229 is developed with respect to

the potential on the reference terminal. Care should be taken to

tie REF to the appropriate local ground.