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ST1S40 数据表(PDF) 19 Page - STMicroelectronics |
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ST1S40 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 29 page  DocID17928 Rev 5 19/29 ST1S40 Application information 29 Figure 8. PCB layout guidelines Input cap as close as possible to VINSW pin Star center for common ground Short FB trace VINA derived from Cin To avoid dynamic voltage drop Between VINA and VINSW Short high switching current loop Via to connect the thermal pad To bottom or inner ground plane |
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