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UC2843BL-S08-R 数据表(PDF) 6 Page - Unisonic Technologies |
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UC2843BL-S08-R 数据表(HTML) 6 Page - Unisonic Technologies |
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6 / 8 page ![]() UC2843B LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 6 of 8 www.unisonic.com.tw QW-R103-048.D APPLICATION INFORMATION(Cont.) Open-Loop Laboratory Test Fixture In the open-loop laboratory test fixture, high peak currents and loads need grounding techniques. The transistor and 5-kΩ potentiometer sample the oscillator waveform, applying an adjustable ramp to the ISENSE terminal. Timing and bypass capacitors should be connected closely to the GND terminal in a single-point ground. Shutdown Technique The PWM controller can be shut down through two methods: the one is raising voltage (above 1 V) at ISENSE, the other is pulling the COMP terminal below a voltage two diode drops above ground. Either method can leave the output of the PWM comparator high (refer to block diagram). To reset the PWM latch is dominant so the output can stay low in the case of the next clock cycle is coming and the COMP or ISENSE terminal is removed beyond this shutdown condition. For example, an externally-latched shutdown can be accomplished by adding an SCR reset by cycling VCC below the lower UVLO threshold. So the reference turns off then allows the SCR to reset at this condition. VREF ISENSE 330Ω 1kΩ 500Ω To Current-Sense Resistor Shutdown COMP |
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