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CS5151 数据表(PDF) 12 Page - Cherry Semiconductor Corporation |
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CS5151 数据表(HTML) 12 Page - Cherry Semiconductor Corporation |
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12 / 14 page ![]() Applications Information: continued 12 RTRACE = This causes the output voltage to be +40mV with no load, and -40mV with a full load, improving regulator transient response. This trace must be wide enough to carry the full output current. (Typical trace is 1.0 inch long, 0.17 inch wide). Care should be taken to minimize any additional losses after the feedback connection point to maximize reg- ulation. 7. If DC regulation is to be optimized (at the expense of degraded transient regulation), adaptive voltage position- ing can be disabled by connecting to VFB pin directly to the load with a separate trace (remote sense). 8. Place 5V input capacitors close to the switching MOS- FET. Route gate drive signal VGATE (pin 10) with a trace that is a minimum of 0.025 inches wide. Figure 18: Layout Guidelines 15 To the negative terminal of the input capacitors 100pF VFFB 11 8 OFF TIME 5 SOFTSTART VCC 0.1µF To the negative terminal of the output capacitors 1.0µF VCOMP 80mV IMAX |
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