CS8129 datasheet(2/8 Pages) CHERRY

2 / 8 page

* To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable.

Delay Time =

= CDelay x 3.5 x 105 (typ)

Note 1: assuming ideal capacitor

CDelay x VDelay Threshold Charge

I Charge

Electrical Characteristics: -40ûC ² TA ² + 125ûC, -40ûC ² TJ ² +150ûC, 6V ² VIN ² 26V, 5mA ² IOUT ² 500mA, R

= 4.7k½ to VOUT

unless otherwise noted*

RESET

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Absolute Maximum Ratings

Input Operating Range..................................................................................................................................................-0.5 to 26V

Power Dissipation.............................................................................................................................................Internally Limited

Peak Transient Voltage (46V Load Dump @ 14V VIN) ...............................................................................................-50V, 60V

Output Current .................................................................................................................................................Internally Limited

ESD Susceptibility (Human Body Model)..............................................................................................................................4kV

Junction Temperature .............................................................................................................................................-55¡C to 150¡C

Storage Temperature...............................................................................................................................................-55¡C to 150¡C

Lead Temperature Soldering

Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak

Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak

Output Stage (VOUT)

Output Voltage

4.85

5.00

5.15

Dropout Voltage

IOUT = 500mA

0.35

0.60

Supply Current

IOUT ² 10mA

IOUT ² 100mA

IOUT ² 500mA

100

Line Regulation

6V ² VIN ² 26V, IOUT = 50mA

Load Regulation

50mA ² IOUT ² 500mA, VIN = 14V

Ripple Rejection

f = 120Hz, VIN = 7 to 17V,

IOUT = 250mA

Current Limit

0.75

1.20

Overvoltage Shutdown

Reverse Polarity Input

VOUT ³ -0.6V, 10½ Load

-15

-30

Voltage DC

Thermal Shutdown

Guaranteed by Design

150

180

210

¡C

and Delay Functions

Delay Charge Current

VDELAY = 2V

µA

Threshold

VOUT Increasing, VRT(ON)

4.05

4.35

4.50

VOUT Decreasing, VRT(OFF)

4.00

4.20

4.45

Hysteresis

VRH=VRT(ON) - VRT(OFF)

150

250

Delay Threshold

Charge, VDC(HI)

3.25

3.50

3.75

Discharge, VDC(LO)

2.85

3.10

3.35

Delay Hysteresis

200

400

800

Output Voltage Low1V < VOUT < VRT(L) , 3k½ to VOUT

0.1

0.4

Output Leakage

VOUT > VRT(H)

010

µA

Current

Delay Capacitor

Discharge Latched ÒONÓ,

0.2

0.5

Discharge Voltage

VOUT > VRT

Delay Time

CDELAY = 0.1µF (Note 1)

RESET

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