CS8151 datasheet(3/8 Pages) CHERRY

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Package Lead Description

Package Lead #

Lead Symbol

Function

Electrical Characteristics: continued

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

s WATCHDOG Input

Threshold

HIGH

1.4

2.0

LOW

0.8

1.3

Hysteresis

100

Input Current

0 < WDI < 6V

-10

+10

µA

Pulse Width

50% WDI falling edge to

µs

50% WDI rising edge and

50% WDI rising edge to 50%

WDI falling edge (see Figure 1)

s WAKE UP Output

WAKE UP Period

see Figure 1a

WAKE UP Duty Cycle nominal

see Figure 1c

HIGH to WAKE UP

50%

rising edge to

Rising Delay Time

50% WAKE UP edge

(see Figure 1)

WAKE UP Response

50% WDI falling edge to

µs

to Watchdog Input

50% WAKE UP falling edge

WAKE UP Response

50%

falling edge to

µs

50% WAKE UP falling edge

VOUT = 5V®4.5V

Output

LOW

IOUT = 25µA(sinking)

0.2

0.8

HIGH

IOUT = 25µA(sourcing)

3.8

4.2

5.1

Current Limit

WAKE UP = 5V

0.025

1.00

7.00

WAKE UP = 0V

.05

3.50

RESET

7L TO-220 &

16 L PDIP

16L SOIC

7L D2PAK

(internally fused) (internally fused)

299

VIN

Supply voltage to the IC.

WDI

CMOS/TTL compatible input lead. The watchdog function

monitors the falling edge of the incoming signal.

4,5,12,13

4,5,6,12,13

Gnd

Ground Connection

Delay

Input lead from timing capacitor for

and WAKE UP

signal.

CMOS/TTL compatible output lead

goes low when-

ever VOUT drops by more than 6% from nominal, or during

the absence of a correct watchdog signal.

WAKE UP

CMOS/TTL compatible output consisting of a continuously

generated signal used to WAKE UP the microprocessor from

sleep mode.

188

VOUT

Regulated output voltage 5V ± 2%.

Sense

Kelvin connection which allows remote sensing of the output

voltage for improved regulation. If remote sensing is not

required, connect to VOUT.

RESET

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