L4971

2/13

Figure 2. Block Diagram

Figure 3. Pin Connections

Table 2. Pin Description

(*) Pins 1, 7, 8, 9, 10, 15 and 16 are not internally, electrically connected to the die.

DIP

SO (*)

Name

Function

1

2

GND

Ground

2

3

SS_INH

A logic signal (active low) disables the device (sleep mode operation).

A capacitor connected between this pin and ground determines the soft start time.

When this pin is grounded disabled the device (driven by open collector/drain).

3

4

OSC

An external resistor connected between the unregulated input voltage and this pin and

a capacitor connected from this pin to ground fix the switching frequency. (Line feed

forward is automatically obtained)

4

5, 6

OUT

Stepdown regulator output

511

Unregulated DC input voltage

6

12

BOOT

A capacitor connected between this pin and OUT allows to drive the internal DMOS

Transistor

7

13

COMP

E/A output to be used for frequency compensation

8

14

FB

Stepdown feedback input. Connecting directly to this pin results in an output voltage of

3.3V. An external resistive divider is required for higher output voltages.

INHIBIT

SOFTSTART

VOLTAGES

MONITOR

THERMAL

SHUTDOWN

E/A

PWM

3.3V

OSCILLATOR

R

S

Q

INTERNAL

REFERENCE

INTERNAL

SUPPLY

3.3V

5.1V

DRIVE

CBOOT

CHARGE

CBOOT

CHARGE

AT LIGHT

LOADS

2

7

8

FB

COMP

SS_INH

3

1

4

6

5

BOOT

OSC

GND

OUT

VCC

D97IN594

GND

SS_INH

OSC

OUT

1

3

2

4

VCC

BOOT

COMP

FB

8

7

6

5

D97IN595

N.C.

GND

SS_INH

OSC

OUT

N.C.

OUT

N.C.

N.C.

N.C.

BOOT

VCC

COMP

FB

N.C.

N.C.

1

3

2

4

5

6

7

8

14

13

12

11

10

9

15

16

D97IN596

DIP8

SO16