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CDB4396 数据表(PDF) 13 Page - Cirrus Logic |
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CDB4396 数据表(HTML) 13 Page - Cirrus Logic |
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13 / 28 page ![]() CS4396 DS288PP1 13 3.3 MODE SELECT Mode Control Register (address 01h) Access: R/W in I2C and SPI. Default: 00000 Function: The Mode Select pins determine the operational mode of the device as detailed in Tables 7-10. The op- tions include: Selection of the Digital Interface Format which determines the required relationship between the Left/Right clock, serial clock and serial data as detailed in Figures 20-23 Selection of the standard 15 µs/50 µs digital de-emphasis filter response, Figure 28, which requires re- configuration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample rates. Selection of the appropriate clocking mode to match the input sample rates. 3.4 POWER DOWN Mode Control Register (address 01h) Access: R/W in I2C and SPI. Default: 1 - Powered Down Function: The analog and digital sections will be placed into a power-down mode when this function is enabled. This bit must be cleared to resume normal operation. 765 4321 0 CAL MUTE M4 M3 M2 M1 M0 PDN 765 4321 0 CAL MUTE M4 M3 M2 M1 M0 PDN PDN MODE 0 Disabled 1 Enabled Table 3. |
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