CS4923 datasheet(49/56 Pages) CIRRUS

49 / 56 page

CS4923/4/5/6/7/8/9

DS262F2

PIN DESCRIPTIONS

VA—Analog Positive Supply: Pin 34

Analog positive supply for clock generator. Nominally +3.3 V.

AGND—Analog Supply Ground: Pin 35

Analog ground for clock generator PLL.

VD1, VD2, VD3—Digital Positive Supply: Pins 1, 12, 23

Digital positive supplies. Nominally +3.3 V.

DGND1, DGND2, DGND3—Digital Supply Ground: Pins 2, 13, 24

Digital ground.

FILT1—Phase-Locked Loop Filter: Pin 33

Connects to an external filter for the on-chip phase-locked loop. This pin does not meet Cirrus

Logic’s ESD tolerance of 2000 V using the human body model. This pin will tolerate ESD of

1000 V using the human body model.

18 19 20 21 22 23 24 25 26 27 28

6 5 4 3 2 1 44 43 42 41 40

CS4923-CL

44-pin PLCC

Top View

VD2

DATA4,EMAD4,GPIO4

DATA5,EMAD5,GPIO5

DATA6,EMAD6,GPIO6

DATA7,EMAD7,GPIO7

A0, SCCLK

A1, SCDIN

RD,R/W,EMOE,GPIO11

WR,DS,EMWR,GPIO10

XMT958

DGND1

VD1

SDATAN1

EXTMEM, GPIO8

ABOOT, INTREQ

SCDIO, SCDOUT,PSEL,GPIO9

DATA0,EMAD0,GPIO0

DATA1,EMAD1,GPIO1

DATA2,EMAD2,GPIO2

DATA3,EMAD3,GPIO3

DGND2

RESET

AUDATA2

AUDATA1

AUDATA0

LRCLK

SCLK

MCLK

VD3

DGND3

SCLKN1, STCCLK2

LRCLKN1

CMPDAT, SDATAN2

CMPCLK, SCLKN2

CMPREQ, LRCLKN2

CLKIN

CLKSEL

FILT2

FILT1

AGND

CS4923 数据表(PDF) 49 Page - Cirrus Logic

CS4923 数据表(HTML) 49 Page - Cirrus Logic

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