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CS4953 数据表(PDF) 7 Page - Cirrus Logic

部件名 CS4953
功能描述  NTSC/PAL Digital Video Encoder
PDF  44 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS4953 数据表(HTML) 7 Page - Cirrus Logic

Back Button CS4953 Datasheet HTML 3Page - Cirrus Logic CS4953 Datasheet HTML 4Page - Cirrus Logic CS4953 Datasheet HTML 5Page - Cirrus Logic CS4953 Datasheet HTML 6Page - Cirrus Logic CS4953 Datasheet HTML 7Page - Cirrus Logic CS4953 Datasheet HTML 8Page - Cirrus Logic CS4953 Datasheet HTML 9Page - Cirrus Logic CS4953 Datasheet HTML 10Page - Cirrus Logic CS4953 Datasheet HTML 11Page - Cirrus Logic Next Button
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CS4952/53
DS223PP2
7
A.C. CHARACTERISTICS:
Tch
Tcl
Tisu
Tih
Toa
CLK
V[7:0]
HSYNC*/VSYNC*
(Inputs)
HSYNC*/VSYNC*/
CB/FIELD/INT
(Outputs)
Figure 1. Video Pixel Data and Control Port Timing
Parameter
Symbol
Min
Typ
Max
Units
Pixel Input and Control Port
Clock Pulse High Time
Tch
14.82
18.52
22.58
ns
Clock Pulse Low Time
Tcl
14.82
18.52
22.58
ns
Clock to Data Set-up Time
Tisu
6-
-
ns
Clock to Data Hold Time
Tih
0-
-
ns
Clock to Data Output Delay
Toa
--
17
ns
Parameter
Symbol
Min
Typ
Max
Units
I2C Host Port Timing
SCL Frequency
Fclk
100
1000
KHz
Clock Pulse High Time
Tsph
0.1
µs
Clock Pulse Low Time
Tspl
0.7
µs
Hold Time (Start Condition)
Tsh
100
ns
Setup Time (Start Condition)
Tssu
100
ns
Data Setup Time
Tsds
50
ns
Rise Time
Tsr
1µs
Fall Time
Tsf
0.3
µs
Setup Time (Stop Condition)
Tss
100
ns
Bus Free Time
Tbuf
100
ns
Data Hold Time
Tdh
0ns
SCL Low to Data Out Valid
Tvdo
600
ns
Figure 2. I2C Host Port Timing
SDA
SCL
Tsh
Tsr
Tspl
Tsf
Tssu
Tsph
Tsds
Tsh
Tss
Tbuf
Tvdo
Tdh



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