
Three-PLL General Purpose
EPROM Programmable Clock Generator
CY2291
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
June 14, 2000, rev. **
Features
Benefits
Three integrated phase-locked loops
Generates up to 3 custom frequencies from external sources
EPROM programmability
Easy customization and fast turnaround
Factory-programmable (CY2291) or field-programmable
(CY2291F) device options
Programming support available for all opportunities
Low-skew, low-jitter, high-accuracy outputs
Meets critical industry standard timing requirements
Power-management options (Shutdown, OE, Suspend)
Supports low-power applications
Frequency select option
8 user-selectable frequencies on CPU PLL
Smooth slewing on CPUCLK
Allows downstream PLLs to stay locked on CPUCLK output
Configurable 3.3V or 5V operation
Enables application compatibility
20-pin SOIC Package
Industry-standard packaging saves on board space
Selector Guide
Part Number
Outputs
Input Frequency Range
Output Frequency Range
Specifics
CY2291
8
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–100 MHz (5V)
76.923 kHz–80 MHz (3.3V)
Factory Programmable
Commercial Temperature
CY2291I
8
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
Factory Programmable
Industrial Temperature
CY2291F
8
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
Field Programmable
Commercial Temperature
CY2291FI
8
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–80 MHz (5V)
76.923 kHz–60.0 MHz (3.3V)
Field Programmable
Industrial Temperature
Logic Block Diagram
32XIN
32XOUT
XTALIN
XTALOUT
S2/SUSPEND
S1
S0
SHUTDOWN/
32K
CONFIG
EPROM
OSC.
XBUF
CPLL
SPLL
UPLL
OSC.
CPUCLK
CLKA
CLKB
CLKC
CLKD
OE
CLKF
/1,2,4
/1,2,3,4,5,6
/8,10,12,13
/20,24,26,40
/48,52,96,104
/2,3,4
/1,2,4,8
(8 BIT)
(8 BIT)
(10 BIT)