DS1232LP/LPS

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the strobe input is not driven low prior to time–out. The

watchdog timer function can be set to operate on time-

out settings of approximately 150 ms, 600 ms, and 1.2

seconds.

OPERATION – POWER MONITOR

The DS1232LP/LPS detects out–of–tolerance power

supply conditions and warns a processor–based sys-

puts the signals RST and RST. When TOL is connected

to ground, the RST and RST signals become active as

falls below 4.5 volts. The RST and RST are excellent

control signals for a microprocessor, as processing is

power–up, RST and RST are kept active for a minimum

of 250 ms to allow the power supply and processor to

stabilize.

OPERATION – PUSHBUTTON RESET

The DS1232LP/LPS provides an input pin for direct con-

nection to a pushbutton (Figure 1). The pushbutton re-

set input requires an active low signal. Internally, this in-

put is debounced and timed such that RST and RST

signals of at least 250 ms minimum are generated. The

250 ms delay starts as the pushbutton reset input is re-

leased from low level.

OPERATION – WATCHDOG TIMER

The watchdog timer function forces RST and RST sig-

nals to the active state when the ST input is not stimu-

lated for a predetermined time period. The time period is

set by the TD input to be typically 150 ms with TD con-

nected to ground, 600 ms with TD left unconnected, and

timer starts timing out from the set time period as soon

as RST and RST are inactive. If a high–to–low transition

occurs on the ST input pin prior to time–out, the watch-

dog timer is reset and begins to time–out again. If the

watchdog timer is allowed to time-out, then the RST and

RST signals are driven to the active state for 250 ms

minimum. The ST input can be derived from micropro-

cessor address signals, data signals, and/or control sig-

nals. When the microprocessor is functioning normally,

these signals would, as a matter of routine, cause the

watchdog to be reset prior to time–out. To guarantee

that the watchdog timer does not time–out, a high–to–

low transition must occur at or less than the minimum

shown in Table 1. A typical circuit example is shown in

Figure 2.

MICROMONITOR BLOCK DIAGRAM

TOL

T.C. REFERENCE

+

–

LEVEL SENSE

VOLTAGE

DIGITAL

DIGITAL

RST

TD

TIME–OUT

RST

ST

PBRST

TOLERANCE

BIAS

AND

DEBOUNCE

SENSE

COMPARATOR

DELAY

SAMPLER