DS1985

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WRITE MEMORY [0FH]

The Write Memory command is used to program the 16384–bit EPROM data field. The bus master will

follow the command byte with a two byte starting address (TA1=(T7:T0), TA2=(T15:T8)) and a byte of

data (D7:D0). A 16-bit CRC of the command byte, address bytes, and data byte is computed by the

DS1985 and read back by the bus master to confirm that the correct command word, starting address, and

data byte were received.

The highest starting address within the DS1985 is 07FFH. If the bus master sends a starting address

higher than this, the five most significant address bits are set to 0 by the internal circuitry of the chip. This

will result in a mismatch between the CRC calculated by the DS1985 and the CRC calculated by the bus

master, indicating an error condition.

If the CRC read by the bus master is incorrect, a Reset Pulse must be issued and the entire sequence must

be repeated. If the CRC received by the bus master is correct, a programming pulse (12 volts on the 1-

Wire bus for 480

µs) is issued by the bus master. Prior to programming, the entire unprogrammed 16384-

bit EPROM data field will appear as logical 1s. For each bit in the data byte provided by the bus master

that is set to a logical 0, the corresponding bit in the selected byte of the 16384-bit EPROM will be

programmed to a logical 0 after the programming pulse has been applied at that byte location.

After the 480

µs programming pulse is applied and the data line returns to the idle level, the bus master

issues eight read time slots to verify that the appropriate bits have been programmed. The DS1985

responds with the data from the selected EPROM address sent least significant bit first. This byte contains

the logical AND of all bytes written to this EPROM data address. If the EPROM data byte contains 1s in

bit positions where the byte issued by the master contained 0s, a Reset Pulse should be issued and the

current byte address should be programmed again. If the DS1985 EPROM data byte contains 0s in the

same bit positions as the data byte, the programming was successful and the DS1985 will automatically

increment its address counter to select the next byte in the 16384-bit EPROM data field. The new 2-byte

address will also be loaded into the 16-bit CRC generator as a starting value. The bus master will issue

the next byte of data using eight write time slots.

As the DS1985 receives this byte of data into the scratchpad, it also shifts the data into the CRC generator

that has been preloaded with the current address and the result is a 16-bit CRC of the new data byte and

the new address. After supplying the data byte, the bus master will read this 16-bit CRC from the DS1985

with 16 read time slots to confirm that the address incremented properly and the data byte was received

correctly. If the CRC is incorrect, a Reset Pulse must be issued and the Write Memory command

sequence must be restarted. If the CRC is correct, the bus master will issue a programming pulse and the

selected byte in memory will be programmed.

Note that the initial pass through the Write Memory flow chart will generate a 16-bit CRC value that is

the result of shifting the command byte into the CRC generator, followed by the two address bytes, and

finally the data byte. Subsequent passes through the Write Memory flow chart due to the DS1985

automatically incrementing its address counter will generate a 16-bit CRC that is the result of loading (not

shifting) the new (incremented) address into the CRC generator and then shifting in the new data byte.