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ZLED7320 数据表(PDF) 21 Page - List of Unclassifed Manufacturers

部件名 ZLED7320
功能描述  High Current 40V LED Driver with Internal Switch
PDF  28 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

ZLED7320 数据表(HTML) 21 Page - List of Unclassifed Manufacturers

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ZLED7320
High Current 40V LED Driver with Internal Switch
Data Sheet
August 12, 2011
© 2011 Zentrum Mikroelektronik Dresden AG — Rev. 1.2
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
21 of 27
nF
367
1
.
0
*
V
24
s
67
.
2
*
A
33
.
0
1
C
MIN
=
µ
=
Example: For an application of 3 LEDs driven at 0.33A and supplied with 24VDC, a maximum ripple of 10% is
allowed. The ZLED7x20 is operated at 150kHz with a duty cycle of 0.4 leading to an on time of 2.67
µs. As
calculated in equation 12, a capacitor C1 of 470nF may be adequate, again including a safety margin of about
50%.
(12)
To achieve maximum stability over temperature and voltage, an X7R, X5R, or better dielectric is recommended
while Y5V must be avoided.
3.3.4
De-bouncing Capacitor C2
External capacitor C2 minimizes ground bounce during switching of the internal MOSFET output switch. Ground
bounce is typically caused by parasitic inductance and resistance due to the distance between the grounds for the
power supply and the ZLED7x20 GND pin. Use a 0.1
µF, X7R ceramic capacitor to ground for C2.
3.3.5
Capacitor C3 for Reducing Output Ripple
If required, the C3 can be used to reduce peak-to-peak ripple current in the LED string. Low ESR capacitors
should be used because the efficiency of C3 largely depends on its ESR and the dynamic resistance of the LEDs.
For an increased number of LEDs, using the same capacitor will be more effective. Lower ripple can be achieved
with higher capacitor values, but this will increase start-up delay by reducing the slope of the LED voltage as well
as cause increased current during converter start-up. The capacitor will not affect operating frequency or effici-
ency. For a simulation or bench optimization, C3 values of a few
µF are an applicable starting point for the given
configuration. Ripple current reduction is approximately proportional to the value of C3.
3.3.6
Diode D1
The flyback diode D1 must have a continuous current rating greater than the maximum output load current and a
peak current rating higher than the peak L1 coil current. Important: Use a low-capacitance, fast Schottky diode
that has low reverse leakage at the maximum operating temperature and maximum operating voltage for the
application to avoid excess power dissipation and optimize performance and efficiency. For silicon diodes, there is
a concern that the higher forward voltage and increased overshoot from reverse recovery time could increase the
peak LX pin voltage (VLX). The total voltage VLX (including ripple voltage) must not be >50V.
3.4
Application Circuit Layout Requirements
The following guidelines are strongly recommended when laying out application circuits:
Important: Locate the L1 inductor and the C1 input decoupling capacitor as close as possible to the
ZLED7x20 to minimize parasitic inductance and resistance, which can compromise efficiency. Use low
resistance connections from L1 to the LX and VIN pins.
All circuit board traces to the LX pin must be as short as possible because it is a high-speed switching
node.
If the ADJ pin floats, all circuit board traces to the ADJ pin must be as short as possible to reduce noise
pickup.



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