ICS8545I

LOW SKEW, 1-TO-4, LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER

IDT™ / ICS™ LVDS FANOUT BUFFER

3

ICS8545BGI REV. B MARCH 02, 2009

Function Tables

Table 3A. Control Input Function Table

After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1.

In the active mode, the state of the outputs are a function of the CLK1 and CLK2 inputs as described in Table 3B.

Figure 1. CLK_EN Timing Diagram

Table 3B. Clock Input Function Table

Inputs

Outputs

OE

CLK_EN

CLK_SEL

Selected Source

Q0:Q3

Q0:Q3

0

X

X

Hi-Z

Hi-Z

10

0

CLK1

Low

High

10

1

CLK2

Low

High

1

1

0

CLK1

Active

Active

1

1

1

CLK2

Active

Active

Inputs

Outputs

CLK1 or CLK2

Q0:Q3

Q0:Q3

0LOW

HIGH

1HIGH

LOW

Enabled

Disabled

CLK1, CLK2

CLK_EN

Q0:Q3

Q0:Q3