EL4584CS datasheet(3/16 Pages) ELANTEC

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EL4584C

Horizontal Genlock 4 FSC

AC Electrical Characteristics (V

5V TA e 25 C unless otherwise noted)

Parameter

Conditions

Temp

Min

Typ

Max

Test

Units

Level

VCO Gain

20 MHz

Test Circuit 1

25 C

155

H-sync SN Ratio

VDD e 5V (Note 2)

25 C35

Jitter

VCXO Oscillator

25 C1

Jitter

LC Oscillator (Typ)

25 C10

Note 2 Noisy video signal input to EL4583C H-sync input to EL4584C Test for positive signal lock

Pin Description

Pin No

Pin Name

Function

1612

Prog ABC

Digital inputs to select d N value for internal counter See table below for values

OscVCO Out

Output of internal inverteroscillator Connect to external crystal or LC tank VCO circuit

4VDD (A)

Analog positive supply for oscillator PLL circuits

OscVCO In

Input from external VCO

6VSS (A)

Analog ground for oscillator PLL circuits

Charge Pump Out Connect to loop filter If the H-sync phase is leading or H-sync frequency l CLKdN current is pumped

into the filter capacitor to increase VCO frequency If H-sync phase is lagging or frequency k CLKdN

current is pumped out of the filter capacitor to decrease VCO frequency During coast mode or when

locked charge pump goes to a high impedance state

Div Select

Divide select input When high the internal divider is enabled and EXT DIV becomes a test pin

outputting CLKdN When low the internal divider is disabled and EXT DIV is an input from an

external dN

Coast

Tri-state logic input Low(k

VCC) e normal mode Hi Z(or

VCC) e fast lock mode

High(l

VCC) e coast mode

H-sync In

Horizontal sync pulse (CMOS level) input

VDD (D)

Positive supply for digital IO circuits

Lock Det

Lock Detect output Low level when PLL is locked Pulses high when out of lock

Ext Div

External Divide input when DIV SEL is low internal dN output when DIV SEL is high

VSS (D)

Ground for digital IO circuits

CLK Out

Buffered output of the VCO

VCO Divisors Table 1

Prog A

Prog B

Prog C

Div Value

Pin 16

Pin 1

Pin 2

851

864

944

1135

682

858

780

910

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