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HM5259165B 数据表(PDF) 3 Page - Elpida Memory

部件名 HM5259165B
功能描述  512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 횞 16-bit 횞 4-bank/16-Mword 횞 8-bit 횞 4-bank /32-Mword 횞 4-bit 횞 4-bank PC/133, PC/100 SDRAM
PDF  63 Pages
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制造商  ELPIDA [Elpida Memory]
网页  http://www.elpida.com/en
标志 ELPIDA - Elpida Memory

HM5259165B 数据表(HTML) 3 Page - Elpida Memory

  HM5259165B Datasheet HTML 1Page - Elpida Memory HM5259165B Datasheet HTML 2Page - Elpida Memory HM5259165B Datasheet HTML 3Page - Elpida Memory HM5259165B Datasheet HTML 4Page - Elpida Memory HM5259165B Datasheet HTML 5Page - Elpida Memory HM5259165B Datasheet HTML 6Page - Elpida Memory HM5259165B Datasheet HTML 7Page - Elpida Memory HM5259165B Datasheet HTML 8Page - Elpida Memory HM5259165B Datasheet HTML 9Page - Elpida Memory Next Button
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HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
3
Pin Arrangement (HM5259165B)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
VSS
DQ15
VSSQ
DQ14
DQ13
VCCQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VCCQ
DQ8
VSS
NC
DQMU
CLK
CKE
A12
A11
A9
A8
A7
A6
A5
A4
VSS
VCC
DQ0
VCCQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VCCQ
DQ5
DQ6
VSSQ
DQ7
VCC
DQML
WE
CAS
RAS
CS
BA0
BA1
A10
A0
A1
A2
A3
VCC
54-pin TSOP
(Top view)
Pin Description
Pin name
Function
Pin name
Function
A0 to A12,
BA0, BA1
Address input
WE
Write enable
 Row address
A0 to A12
DQMU/DQML
Input/output mask
 Column address
A0 to A9
CLK
Clock input
 Bank select address BA0/BA1 (BS) CKE
Clock enable
DQ0 to DQ15
Data-input/output
V
CC
Power for internal circuit
CS
Chip select
V
SS
Ground for internal circuit
RAS
Row address strobe command
V
CCQ
Power for DQ circuit
CAS
Column address strobe command
V
SSQ
Ground for DQ circuit
NC
No connection



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