NVT2004TL datasheet(7/33 Pages) PHILIPS

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NVT2003_04_06

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Product data sheet

Rev. 5 — 19 February 2014

7 of 33

NXP Semiconductors

NVT2003/04/06

Bidirectional voltage-level translator

(1) In the Enabled mode, the applied enable voltage VI(EN) and the applied voltage at Vref(A) should be

such that Vref(B) is at least 1 V higher than Vref(A) for best translator operation.

(2) Note that the enable time and the disable time are essentially controlled by the RC time constant of

the capacitor and the 200 k

 resistor on the EN pin.

Fig 8.

Typical application circuit (switch enable control)

Fig 9.

Bidirectional translation to multiple higher voltage levels

002aae135

VREFA

GND

VREFB

8EN

NVT2002

200 k

RPU

Vpu(D) = 3.3 V

I2C-BUS

DEVICE

SCL

SDA

VCC

GND

Vref(A) = 1.8 V(1)

RPU

I2C-BUS

MASTER

SCL

SDA

VCC

GND

off

3.3 V enable signal(1)

(2)

VREFB

002aae133

200 k

CHIPSET I/O

VCC

5 V

totem pole or

open-drain I/O

GND

VREFA

VCC

3.3 V

CPU I/O

VCORE

1.8 V

1.5 V

1.2 V

1.0 V

NVT20XX

CHIPSET I/O

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