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L6920

Time div.: 5

µs/div

4.1 Start-up

One of the key features of L6920 is the startup at sup-

ply voltage down to 1V (please see the diagram in

Figure 5. in case of heavy load).

The device leaves the startup mode of operation as

soon as VOUT goes over 1.4V. During startup, the

synchronous switch is off and the energy is trans-

ferred to the load through its intrinsic body diode.

The N-channel switches with a very low RDSon

thanks to an internal charge pump used to bias the

power mos gate. Because of this modified behavior,

TON/TOFF times are lengthened. Current limit and

zero crossing detection are still available.

4.2 Shutdown

In shutdown mode (SHDN pulled low) all internal cir-

cuitries are turned off, minimizing the current provid-

Both switches are turned off, and the low battery

comparator output is forced in high impedance state.

The synchronous switch body diode causes a para-

sitic path between power supply and output that can't

be avoided also in shutdown.

4.3 Low battery detection

The L6920 includes a low battery detector compara-

tor. Threshold is VREF voltage and a 1.3% hystere-

sis is added to avoid oscillations when input crosses

the threshold slowly. The LBO is an open drain out-

put so a pull up resistor is required for a proper use.

4.4 Reverse polarity

A protection circuit has been implemented to avoid

that L6920 and the battery are destroyed in case of

wrong battery insertion.

In addition, this circuit has been designed so that the

current required by the battery is zero also in reverse

polarity.

5

Application Information

5.1 Output voltage selection

Output voltage must be selected acting on FB pin.

Three choices are available: fixed 3.3V, 5V or adjust-

able output set via an external resistor divider.

Table 5. Output Voltage Selection

FB pin connected to OUT (see

application circuit)

FB pin connected to GND

2V

FB pin connected to a resistive

divider

V

OUT

1.23V 1

R4

R5

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