MB89913 datasheet(21/53 Pages) FUJITSU

21 / 53 page

MB89910 Series

The RP indicates the address of the register bank currently in use. The relationship between the pointer contents

and the actual address is based on the conversion rule illustrated below.

The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and

bits for control of CPU operations at the time of an interrupt.

H-flag:

Set to ‘1’ when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared

to ‘0’ otherwise. This flag is for decimal adjustment instructions.

I-flag:

Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’. Cleared

to ‘0’ at the reset.

IL1, 0:

Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is

higher than the value indicated by this bit.

N-flag:

Set to ‘1’ if the MSB becomes to ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ when the bit

is cleared to ‘0’.

Z-flag:

Set to ‘1’ when an arithmetic operation results in 0. Cleared to ‘0’ otherwise.

V-flag:

Set to ‘1’ if the complement on 2 overflows as a result of an arithmetic operation. Cleared to to ‘0’ if the

overflow does not occur.

C-flag:

Set to ‘1’ when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to

‘0’ otherwise. Set to the shift-out value in the case of a shift instruction.

IL1

IL0

Interrupt level

High-low

High

Low

• Rule for Conversion of Actual Addresses of the General-purpose Register Area

“0”

↓

A15

“0”

↓

A14

“0”

↓

A13

“0”

↓

A12

“0”

↓

A11

“0”

↓

A10

“0”

↓

“1”

↓

Generated addresses

Lower OP codes

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