PS20355

Typical load capacitance

20pF

Drive level

0.4 mW max

Equivalent series resistance

<40

Figure 14

- Crystal Oscillator Circuit

XTI

XT0

OSCMODE

XTI

C1

C2

4.5.1

Selection of External Components

The capacitor values used must ensure correct operation of the Pierce oscillator such that the total loop gain is

greater than unity. Correct selection of the two capacitors is very important and the following method is

recommended to obtain values for C1 and C2. Alternatively there is a calculator available (ZLAN-125) that will

calculate the external component values for you.

4.5.1.1

Loop Gain Equation

Although oscillation may still occur if the loop gain is just above 1, a loop gain of between 5 and 25 is optimum to

ensure that oscillations will occur across all variations in temperature, process and supply voltage, and that the

circuit will exhibit good start-up characteristics.

4.5.1.2

List of Equation Parameters

A

total loop gain (between 5 and 25)

Cin

C1 + Cpar

Cout

C2 + Cpar

Cpar parasitic capacitance associated with each oscillator pin

package capacitance and cell input capacitance. Normally Cpar ≈ 4pF.

Zo

9.143k

Ω - output impedance of amplifier at 1.8V operation - typical

gm

8.736mA/V - transconductance of amplifier at 1.8V operation -typical

Rf

2.3M

Ω - internal feedback resistor

ESR maximum equivalent series resistance of crystal - given by crystal manufacturer (

Ω)

f

fundamental frequency of crystal (Hz)

PLESSEY SEMICONDUCTORS LTD

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