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DAC8408FPC3 数据表(PDF) 5 Page - Analog Devices

部件名 DAC8408FPC3
功能描述  Quad 8-Bit Multiplying CMOS D/A Converter with Memory
PDF  16 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

DAC8408FPC3 数据表(HTML) 5 Page - Analog Devices

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DAC8408
–5–
REV. A
WAFER TEST LIMITS at VDD = +5 V; VREF = 10 V; VOUTA, B, C, D = 0 V; TA = +25 C, unless otherwise noted. Specifications apply for
DAC A, B, C, & D.
DAC8408G
Parameter
Symbol
Conditions
Limits
Units
STATIC ACCURACY
Resolution
N
8
Bits min
Nonlinearity
1
INL
±1/2
LSB max
Differential Nonlinearity
DNL
±1
LSB max
Gain Error
GFSE
Using Internal RFB
±1
LSB max
Power Supply Rejection
PSR
Using Internal RFB
0.001
%FSR/% max
(
∆V
DD =
±10%)2
IOUT 1A, B, C, D Leakage Current
ILKG
All Digital Inputs = 0 V
±30
nA max
VREF = +10 V
REFERENCE INPUT
Reference Input
RIN
6/14
k
Ω min/max
Resistance
3
Input Resistance Match
RIN
±1
% max
DIGITAL INPUTS
Digital Input Low
VIL
0.8
V max
Digital Input High
VIH
2.4
V min
Input Current
4
IIN
±1.0
µA max
DATA BUS OUTPUTS
Digital Output Low
VOL
1.6 mA Sink
0.4
V max
Digital Output High
VOH
400
µA Source
4
V min
Output Leakage Current
ILKG
±1.0
µA max
POWER SUPPLY
Supply Current
5
IDD
50
µA max
Supply Current6
IDD
1.0
mA max
NOTES
1This is an endpoint linearity specification.
2FSR is Full Scale Range = V
REF –1 LSB.
3Input Resistance Temperature Coefficient approximately equals +300 ppm/
°C.
4Logic inputs are MOS gates.Typical input current at +25
°C is less than 10 nA.
5All Digital Inputs are either “0” or V
DD.
6All Digital Inputs are either V
IH or VIL.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.



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