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L6561 数据表(PDF) 2 Page - STMicroelectronics |
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L6561 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 13 page ![]() L6561 2/13 Table 2. Absolute Maximum Ratings Figure 3. Pin Connection (Top view) Table 3. Thermal Data Table 4. Pin Description (1) Parameter guaranteed by design, not tested in production. Symbol Pin Parameter Value Unit IVcc 8Iq + IZ; (IGD = 0) 30 mA IGD 7 Output Totem Pole Peak Current (2 µs) ±700 mA INV, COMP MULT 1, 2, 3 Analog Inputs & Outputs -0.3 to 7 V CS 4 Current Sense Input -0.3 to 7 V ZCD 5 Zero Current Detector 50 (source) -10 (sink) mA mA Ptot Power Dissipation @Tamb = 50 °C (DIP-8) (SO-8) 1 0.65 W W Tj Junction Temperature Operating Range -40 to 150 °C Tstg Storage Temperature -55 to 150 °C Symbol Parameter SO 8 MINIDIP Unit Rth j-amb Thermal Resistance Junction to ambient 150 100 °C/W N. Name Function 1 INV Inverting input of the error amplifier. A resistive divider is connected between the output regulated voltage and this point, to provide voltage feedback. 2 COMP Output of error amplifier. A feedback compensation network is placed between this pin and the INV pin. 3 MULT Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A voltage signal, proportional to the rectified mains, appears on this pin. 4 CS Input to the comparator of the control loop. The current is sensed by a resistor and the resulting voltage is applied to this pin. 5 ZCD Zero current detection input. If it is connected to GND, the device is disabled. 6 GND Current return for driver and control circuits. 7 GD Gate driver output. A push pull output stage is able to drive the Power MOS with peak current of 400mA (source and sink). 8VCC Supply voltage of driver and control circuits. INV COMP MULT CS 1 3 2 4ZCD GND GD VCC 8 7 6 5 DIP8 |
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