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数据搜索系统，热门电子元器件搜索 |
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HT1621 数据表(PDF) 10 Page - Holtek Semiconductor Inc |
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HT1621 数据表(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 20 page  HT1621 10 April 21, 2000 enter the power down mode, similar to the case in the external 256kHz clock source operation. At the initial system power on, the HT1621 is at the SYS DIS state. Time base and Watchdog Timer (WDT) The time base generator is comprised by an 8-stage count-up ripple counter and is designed to generate an accurate time base. The watch dog timer (WDT), on the other hand, is com- posed of an 8-stage time base generator along with a 2-stage count-up counter, and is de- signed to break the host controller or other sub- systems from abnormal states such as unknown or unwanted jump, execution errors, etc. The WDT time-out will result in the setting of an internal WDT time-out flag. The outputs of the time base generator and of the WDT time-out flag can be connected to the IRQ out- put by a command option. There are totally eight frequency sources available for the time base generator and the WDT clock. The fre- quency is calculated by the following equation. fWDT = 32kHz 2n where the value of n ranges from 0 to 7 by com- mand options. The 32kHz in the above equation indicates that the source of the system fre- quency is derived from a crystal oscillator of 32.768kHz, an on-chip oscillator (256kHz), or an external frequency of 256kHz. If an on-chip oscillator (256kHz) or an external 256kHz frequency is chosen as the source of the system frequency, the frequency source is by de- fault prescaled to 32kHz by a 3-stage prescaler. Employing both the time base generator and the WDT related commands, one should be careful since the time base generator and WDT share the same 8-stage counter. For example, invoking the WDT DIS command disables the time base generator whereas executing the WDT EN command not only enables the time base generator but activates the WDT time-out flag output (connect the WDT time-out flag to the IRQ pin). After the TIMER EN command is transferred, the WDT is disconnected from the IRQ pin, and the output of the time base generator is connected to the IRQ pin. The WDT can be cleared by executing the CLR WDT command, and the contents of the time base generator is cleared by executing the CLR WDT or the CLR 1/ 8 OSC I OSC O C r yst a l O sci l l a t o r 3276 8H z E x te r n a l C l o c k So u r c e 256k H z O n - c h i p R C O s c illa t o r 256k H z Syst e m Cl o c k System oscillator configuration TI M E R E N / D I S W D T E N /D IS V DD IR Q IR Q E N /D IS D CK Q R CL R W D T Syst e m C l o ck f = 32k H z / 256 /4 WD T Ti m e r / W D T C l o ck So u r ce s /2 n n= 0 ~ 7 Timer and WDT configurations |
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