HT1623 datasheet(9/18 Pages) HOLTEK

9 / 18 page

HT1623

April 21, 2000

Functional Description

Display memory - RAM structure

The static display RAM is organized into 96´4

bits and stores the display data. The contents of

the RAM are directly mapped to the contents of

the LCD driver. Data in the RAM can be

accessedbytheREAD,WRITEand

READ-MODIFY-WRITE commands. The fol-

lowing is a mapping from the RAM to the LCD

patterns.

Time base and watchdog timer - WDT

The time base generator and WDT share the

same divided (/256) counter. TIMER DIS/EN/CLR,

WDT DIS/EN/CLR and IRQ EN/DIS are inde-

pendent from each other. Once the WDT

time-out occurs, the IRQ pin will remain at

logic low level until the CLR WDT or the IRQ

DIS command is issued.

SE G 0

SE G 1

SE G 2

SE G 3

SE G 4 7

CO M 4

CO M 5

CO M 6

CO M 7

Da t a

A ddr

CO M 0

CO M 1

CO M 2

CO M 3

A ddr

D a ta 4 B i t s

( D 3 , D 2 , D 1 , D 0 )

A ddr es s 7 B i t s

( A 6 , A 5 , .... , A 0 )

Da t a

RAM mapping

WD T E N / D I S

IR Q E N /D IS

CL R W D T

C l o ck S o u r ce

/ 256

Ti m e B a s e

CL R T i m e r

IR Q

WD T

V DD

T I M E R E N /D IS

Timer and WDT configurations

HT1623 数据表(PDF) 9 Page - Holtek Semiconductor Inc

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