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HT6542B 数据表(PDF) 2 Page - Holtek Semiconductor Inc |
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HT6542B 数据表(HTML) 2 Page - Holtek Semiconductor Inc |
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2 / 7 page ![]() Block Diagram Pin Description Pin No. (DIP) Pin No. (PLCC) Pin Name I/O Pin Descriptions 1 2 KBCI I Keyboard clock input pin 2,3 3,4 OSCI,OSCO I System clock input pin, to generate internal oscillator signal 45 RES I Low level to reset HT6542B. After RES goes to high level HT6542B needs 10ms to initial internal circuit 5,7,11,25 1,6,8,12,13, 23,29,34 NC — No connection 67 CS I Host-interface chip select, active low 89 RD I Host-interface read signal, active low 910 A0 I Host-interface address select input. When high, it selects the command/status registers; when low it selects the data register HT6542B 2 30th Nov ’95 |
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