Pin Description

Pin Name I/O

Description

Power Inputs

VDD

¾ Power-VDD is the input power for the internal logic.

VSS

¾ Ground-VSS is ground connection for the internal logic.

PDWN

I

A logic ²1² on this pin puts the chip in power down mode. When a logic ²0² is on

this pin, the chip is activated. This is a schmitt trigger input.

Clock

X1

I

A crystal or ceramic resonator should be connected to this pin and X2.

This pin may be driven from an external clock source.

X2

O

A crystal or ceramic resonator should be connected to this pin and X1.

Ring Detections

RDET1

I

It detects ring energy on the line through an attenuating network and enables

the oscillator and ring detection. This is a schmitt trigger input.

RDET2

I

It couples the ring signal to the precision ring detector through an attenuating

network. RDET=²0² if a valid ring signal is detected. This is a schmitt trigger in-

put.

RTIME

I/O

An RC network may be connected to this pin in order to hold the pin voltage be-

low 2.2V between the peaks of the ringing signal. This pin controls internal

power up and activates the partial circuitry needed to determine whether the

incoming ring is valid or not. The input is a schmitt trigger input. The output

cell structure is an NMOS output.

FSK Signal Inputs

TIP

I

This input pin is connected to the tip side of the twisted pair wires. It is inter-

DC isolated from the line.

RING

I

This input pin is connected to the ring side of the twisted pair wires. It is inter-

DC isolated from the line.

Detection Results

RDET

O

This open drain output goes low when a valid ringing signal is detected. When

connected to PDWN pin, this pin can be used for auto power up.

CDET

O

This open drain output goes low indicating that a valid carrier is present on the

line. A hysteresis is built-in to allow for a momentary drop out of the carrier.

When connected to PDWN pin, this pin can be used for auto power up.

DOUT

O

This pin presents the output of the demodulator whenever CDET pin is low.

This data stream includes the alternate ²1² and ²0² pattern, the marking, and

the data. At all other times, this pin is held high.

HT9032

3

April 6, 2000