Pin Name

I/O

Internal

Connection

Description

DTMF

O

CMOS OUT

This pin is active only when the chip transmits tone dialing signals. Otherwise, it

always outputs a low. The pin outputs tone signals to drive the external trans-

mitter amplifier circuit. The load resistor should not be less than 5k

W.

HDI

I

CMOS IN

Pull-high

This pin is a Schmitt trigger input structure. Active low. Applying a negative go-

ing pulse to this pin can toggle the HDO output once.

An external RC network is recommended for input debouncing. The Pull-high

resistance is 200k

W typ.

HDO

O

CMOS OUT

The HDO is a CMOS output structure. Its output is toggle- controlled by a nega-

tive transition on HDI. When HDO is toggled high, PO keeps high to hold the

line. The hold function can be released by setting HFO high or by an on-off hook

operation or by another HDI input. Refer to the functional description for the

hold-line function.

HFI

I

CMOS IN

Pull-low

This pin is a Schmitt trigger input structure. Active high. Applying a positive go-

ing pulse to HFI can toggle the HFO once and hence control the hand-free func-

tion. The Pull-low resistance of HFI is 200k

W typ.

An external RC network is recommended for input debouncing.

HFO

O

CMOS OUT

The HFO is a CMOS output structure. Its output is toggle- controlled by a posi-

tive transition on HFI pin. When HFO is high, the hand-free function is enabled

and PO outputs a high to connect the line.

The hand-free function can be released by setting HDO high or by an on-off-hook

operation or by another HFI input. Refer to the functional description for the

hand-free functional operation.

LOCK

I/O

CMOS IN/OUT

This is a three-state input/output pin, used for controlling long distance call

function with a lock-switch.

LOCK=OPEN: Normal dialing (no lock)

LOCK=VDD:

²0, 9² is inhibited for use as the first key input

LOCK=VSS:

²0² is inhibited for use as the first key input

DOUT

O

NMOS OUT

NMOS open drain output pin. It outputs the BCD code of the dialing digits to the

LCD driver chip (HT16XX series) or MCU for dialing number display. Refer to

the functional description for the detailed timing.

CLOCK

O

NMOS OUT

NMOS open drain output. When dialing, it outputs a series of pulse trains for

DOUT data synchronization. DOUT data is valid at the falling edge of clock.

VDD

¾¾

Positive power supply, 2.0V~5.5V for normal operation

VSS

¾¾

Negative power supply, ground

Approximate internal connection circuits

HT9302 Series

Rev. 1.20

4

September 30, 2002

N M O S O U T

C M O S I N / O U T

C M O S I N

P u l l - l o w

C M O S I N

P u l l - h i g h

C M O S I N

O S C I L L A T O R

X 1

X 2

1 0 M W

2 0 p .

1 0 p .

C M O S O U T