1-280

Conversion Mode

The conversion mode determines

the speed/resolution trade-off for

the Isolated A/D converter. The

four MSBs of registers 0 and 1

Table 4. Conversion Mode Configuration.

Configuration Data Bits

Mode

Bit 7

Bit 6

Bit 5

Bit 4

1

Low

High

Low

High

2

Low

Low

High

High

3

High

High

High

Low

4

High

High

Low

Low

5

High

Low

High

Low

Note: Bold italic type indicates default values.

determine the conversion mode

for the appropriate channel. The

bit settings for choosing a partic-

ular conversion mode are shown

in Table 4 below. See Table 2 for

a summary of how performance

changes as a function of conver-

sion mode setting. Combinations

of data bits not specified in Table

4 below are not recommended.

Conversion

0

1

2

3

Table 3. Register Configuration.

Configuration Data Bits

Address Bits

Register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Channel 1 Conversion Mode

Channel 1

Reserved

Offset Cal

High

High

Low

Low

Low

Low

Low

Low

Channel 2 Conversion Mode

Channel 2

Reserved

Offset Cal

High

High

Low

Low

Low

Low

Low

High

Threshold

Threshold Level

Detection Time

High

Low

Low

Low

Low

Low

High

Low

Pre-Trigger Mode

Reserved

Low

Low

Low

Low

Low

Low

High

High

Note: Bold italic type indicates default values. Reserved bits should be set low.