| 数据搜索系统,热门电子元器件搜索 |
|
GL6965 数据表(PDF) 4 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
GL6965 数据表(HTML) 4 Page - Hynix Semiconductor |
|
4 / 23 page ![]() GL6965 4 Pin Descriptions Pin No. Symbol Function Explanation 1 VL Line Current flow-in and Line Voltage terminal Connected to positive output of diode bridge circuit. DC potential of this terminal determines line voltage and if AC signal is not input, the highest DC potential appears. Transmit output signal and output signal of opposite transfer side are intermingled and output at this terminal in actual use. 2 TOI Current flow-in terminal of transmit output Connected to VL terminal ( pin) through 43 Ω . Since almost all the line currents flow in from this terminal, set allowable power of resistance 43 Ω to be connected to VL terminal from this terminal considering the maximum line cur-rent expected to be used. 3 TOO Current output terminal of transmit output Connected to GND terminal ( pin) through 15 Ω . Since almost all the line currents flow out from this terminal, set allowable power of resistance 15 Ω to be connected to GND terminal from this terminal considering the maximum line cur-rent expected to be used. Transmit signal is sent from this terminal. Signal of this ter- minal varies current which is input from line through con- nected resistance 15 Ω , and makes it be output at VL terminal ( pin) 4 AC Bias AC signal reference Voltage terminal When AC signal is input to this terminal through capacitor (for blocking DC), signal is sent to line, Input from this ter- minal is output to line without any relation to gain control (PAD) or MUTE since this input does not pass through gain control circuit or MUTE function 5 MFI Input terminal of DTMF or external input signal Signal which is input to this terminal is output at VL terminal ( pin) only when MUTE terminal ( pin) is in “L” state. Since this terminal is biased to almost the same potential as REF terminal ( pin), avoid direct impressing external DC potential by using capacitor at inputting external terminal. 6 TPO Output terminal of transmit input Amp. Makes negative feedback to TPI1 terminal ( pin) 7 TPI1 Inversion input terminal of transmit input Amp. Receives negative feedback from TPO terminal ( pin) 8 TPI2 Non-inversion input terminal of transmit input Amp. Applies DC bias to this terminal from REF terminal ( pin) through resistance 1 1 1 10 9 13 7 6 13 |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |