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HDM8513 数据表(PDF) 41 Page - Hynix Semiconductor |
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HDM8513 数据表(HTML) 41 Page - Hynix Semiconductor |
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41 / 67 page ![]() 41 retransmit the HDM8513A slave address, this time with the read/not write bit set to one (read). This will be acknowledged by the HDM8513A, which then assumes the role of slave transmitter and transmits the requested byte. This byte should be acknowledged by the master receiver. If no stop condition is generated by the master, the HDM8513A will increment its word address pointer and transmit the next byte of information. This process is detailed in Figure 26. S SLAVE ADDRESS 0 A WORD ADDRESS A S SLAVE ADDRESS 1 A DATA BYTE A 7 Bits 8 Bits 7 Bits acknowledgement from slave R/W acknowledgement from slave acknowledgement from slave acknowledgement from master R/W auto increment memory word address DATA BYTE A P auto increment memory word address acknowledgement from master last byte S: Start Condition A: Acknowledge P: Stop Condition HDM8513A becomes slave transmitter FIGURE 27: I2C READ FROM THE HDM8513A Table 13: I2C Slave Address I2C_ADD0 I2C_ADD1 I2C_ADD2 I2C Address 0 0 0 0000000 1 0 0 0000011 0 1 0 0001100 1 1 0 0001111 0 0 1 0110000 1 0 1 0110011 0 1 1 0111100 1 1 1 0111111 |
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