5

ICS1522

ICS1522 Register Definition

REG#

BIT(S)

BIT REF.

DESCRIPTION

0

0-10

F[0:10]

Feedback Divider (Default=04F, Modulus=80) Divides the VCO

by the set modulus Modulus Range=64 to 2048;

Modulus=Value+1

1

0-7

LO[0:7]

Feedback Sync Pulse LO (Default=03) Feedback Divider output,

but with programmable phase; LO[0:7] <F[3:10].

2

0-7

HI[0:7]

Feedback Sync Pulse HI (Default=06) Feedback Divider output,

but with programmable phase; HI[0:7] <F[3:10].

3

0-9

R[0:9]

Reference Divider (Default=013, Modulus=20) Divides the

XTAL/EXTREF by the set modulus Modulus Range=1 to 1024;

Modulus=Value+1

3

1 0

REF_POL

External Reference Polarity (Default=0) 0=Positive Edge;

1=Negative Edge

4

0-2

VCO[0:2]

VCO Gain (Default=4)

VCO(2)

VCO(1)

VCO(0)

VCO GAIN

0

0

0

10 MHz/V

0

0

1

15 MHz/V

0

1

0

20 MHz/V

0

1

1

25 MHz/V

1

0

0

45 MHz/V

1

0

1

60 MHz/V

1

1

0

75 MHz/V

1

1

1

90 MHz/V