MDS 1523 Y

6

Revision 110905

Integrated Circuit Systems

525 Race Street, San Jose, CA 95126

tel (408) 297-1201

www.icst.com

ICS1523

Section 4 Register Set Summary

Note 1: Double-buffered register. Working registers are loaded during software PLL reset. See 0x8.

Note 2: Double-buffered register. Working registers are loaded during software DPA reset. See 0x8.

Notes 3~8: See Section 5, “Register Set Details”

Reg.

Index

Name

Access

Bit Name

Bit#

Reset

Value

Description

Note

0x0

Input

Control

R / W

CPen

0

1

Charge Pump Enable

0=External Enable via COAST Pin, 1=Always Enabled

3

CP_Pol

1

0

COAST Pin Charge Pump Enable Polarity

0=Active High, 1=Active Low

3

Ref_Pol

2

0

External Reference Polarity

0=Positive Edge, 1=Negative Edge

Fbk_Pol

3

0

External Feedback Polarity

0=Positive Edge, 1=Negative Edge

Fbk_Sel

4

0

External Feedback Select

0=Internal Feedback, 1=External

Func_Sel

5

0

FUNC Pin Output Select (DPA delayed)

0=Recovered HSYNC, 1=Input HSYNC

EnPLS

6

1

Enable PLL Lock/Ref Status Output

0=Disable 1=Enable

4

EnRef

7

0

1=Enable Ref to Lock/Ref Output

4

0x1

Loop

Control

R / W

ICP0-2

0-2

0

ICP (Charge Pump Current)

Bit 2,1,0=(000 =1 uA, 001 = 2 uA, 010 = 4 uA, 011 = 8 uA,

100 = 16 uA, 101 = 32 uA, 110 = 64 uA, 111 = 128 uA

1, 6

Reserved

3

0

Reserved

VCOD0-1

4-5

0

VCO Divider Bit 5,4 =(00 = ÷2, 01=÷4, 10=÷8, 11=÷16)

1, 7

Reserved

6-7

0

Reserved

0x2

FdBk Div 0

R / W

FBD0-7

0-7

FF

Feedback Divider LSBs (Bit 7, 6, 5, 4, 3, 2, 1, 0)

Actual # of clocks = Programmed value + 8

1

0x3

FdBk Div 1

R / W

FBD8-11

0-3

F

Feedback Divider MSBs (Bit 11, 10, 9, 8)

1

Reserved

4-7

0

Reserved

0x4

DPA Offset

R / W

DPA_OS0-5

0-5

0

Dynamic Phase Aligner Offset

Bit 5, 4, 3, 2, 1, 0 = (MUST be < total # of DPA elements)

8

Reserved

6

0

Reserved

Fil_Sel

7

0

Loop Filter Select (0=External, 1=Internal)

6

0x5

DPA

Control

R / W

DPA_Res0-1

0-1

3

DPA Resolution, Total # of delay elements

Bit 1, 0 = (00 = 16, 01 = 32, 10 = Reserved, 11 = 64)

2, 8

Metal_Rev

2-7

0

Metal Mask Revision Number