2

ICS1887

Pin Descriptions

Note:

1. A running production change will be made to this input in the June 1996 time frame to convert this

input from the TTL-compatible to PECL to more closely match applications requirements. See

Substituting the ICS1887 for the AMD PDR & PDT applications note for more information.

2. This pin was formerly used for Loop-Timed operation. If your design did not use loop timing, this

change does not affect you. If your application requires loop timing, please contact ICS.

* Active Low Input.

PIN

NUMBER

PIN NAME

TYPE

DESCRIPTION

1

VSS

Negative Supply Voltage

2

TXOFF~

2

TTL-Compatible

Transmitter Off*

3

CD~

TTL-Compatible

1

Carrier Detect input*

4

TX+

PECL

Positive Transmit serial data output

5

TX–

PECL

Negative Transmit serial data output

6

VSS

Negative supply voltage

7

IPRG1

PECL Output stage current set (TX)

8

RX–

PECL

Negative Receive serial data input

9

RX+

PECL

Positive Receive serial data input

10

LB~

TTL-Compatible

Loop Back mode select*

11

LOCK

TTL-Compatible

Lock detect output

12

RD4

TTL-Compatible

Recovered data output 4

13

RD3

TTL-Compatible

Recovered data output 3

14

VSS

Negative supply voltage

15

RD2

TTL-Compatible

Recovered data output 2

16

RD1

TTL-Compatible

Recovered data output 1

17

RD0

TTL-Compatible

Recovered data output 0

18

RCLK

TTL-Compatible

Recovered Receive clock output

19

VDD

Positive supply voltage

20

REF_IN

Positive reference clock/crystal input

21

REF_OUT

Negative reference clock/crystal output

22

VDD

Positive supply voltage

23

TCLK

TTL-Compatible

Transmit clock output

24

TD0

TTL-Compatible

Transmit data input 0

25

TD1

TTL-Compatible

Transmit data input 1

26

TD2

TTL-Compatible

Transmit data input 2

27

TD3

TTL-Compatible

Transmit data input 3

28

TD4

TTL-Compatible

Transmit data input 4