REF

Comments

Reference

Buffered oscillator output

Reference/2

Oscillator frequency divided by two

CLK/2

CLK frequency divided by two

Off

Output stopped low. Lowest jitter

MDS 300QT E

2

Revision 111000

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel• www.icst.com

ICS300/ICS301/ICS302

QTClock™ Quick Turn Clock Synthesizer

Pin Assignments

1

8

2

3

4

7

6

5

X1/ICLK

VDD

GND

REF

X2

PDTS

DC

CLK

Number Number

Name

Type Description

300/1

302

1

8

X1/ICLK

I

Crystal connection or clock input. Clock only on ICS302.

2

2

VDD

P

Connect to +3.3V or +5V.

3

1, 3

GND

P

Connect to ground.

4

4

REF

O

Buffered crystal oscillator output clock, or variation per REF clock options table above.

5

5

CLK

O

Clock output. Fixed frequency between 6 and 200 MHz programmed at factory.

6

6

DC

-

Don't Connect anything to this pin.

7

7

PDTS

I

Powers down PLL, and puts both outputs into high impedance state, when low.

8

-

X2

O

Crystal connection. Leave unconnected for clock input.

Pin Descriptions

Key: I = Input, O = output, P = power supply connection

REF Clock Options

External Components / Crystal Selection

The ICS300/301/302 requires a 0.01µF decoupling capacitor to be connected between VDD and GND.

It must be connected close to the ICS300/301/302 to minimize lead inductance. No external power

supply filtering is required for this device. A 33

Ω terminating resistor can be used next to the CLK and

REF pins. The total on-chip capacitance is approximately 16 pF, so a parallel resonant, fundamental mode

crystal should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors

can be connected from each of the pins X1 and X2 to Ground. The value (in pF) of these crystal caps

should be = (CL-16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only

required for applications where the exact frequency is critical. For a clock input, connect to X1/ICLK and

leave X2 unconnected (no capacitors on either).

Device Configuration

The specification is complete when the ICS300/301/302 QTClock Order Form accompanies this data

sheet. The order form lists the input, REF, and CLK actual frequencies, as well as any other available

options. This unique configuration is given a two character alphanumeric programming code, which must

be specified when referring to samples.

ICS300

ICS301

1

8

2

3

4

7

6

5

ICLK

VDD

GND

REF

PDTS

DC

CLK

GND

ICS302