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ICS503 数据表(PDF) 3 Page - Integrated Circuit Systems |
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ICS503 数据表(HTML) 3 Page - Integrated Circuit Systems |
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3 / 4 page ![]() ICS503 LOCO™ PLL Clock Multiplier MDS 503 A 3 Revision 111000 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com PRELIMINARY PRELIMINARY INFORMATION INFORMATION Parameter Conditions Minimum Typical Maximum Units ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) Supply Voltage, VDD Referenced to GND 7 V Inputs Referenced to GND -0.5 VDD+0.5 V Clock Output Referenced to GND -0.5 VDD+0.5 V Ambient Operating Temperature 0 70 °C Soldering Temperature Max of 10 seconds 260 °C Storage temperature -65 150 °C DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Operating Voltage, VDD 3 5.5 V Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 V Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 (VDD/2)-1 V Input High Voltage, VIH S1, S0 VDD-0.5 V Input Low Voltage, VIL S1, S0 0.5 V Output High Voltage, VOH, CMOS high IOH=-4mA VDD-0.4 V Output High Voltage, VOH IOH=-25mA 2.4 V Output Low Voltage, VOL IOL=25mA 0.4 V IDD Operating Supply Current, 14 MHz crystal No Load, 80MHz 16 mA Short Circuit Current CLK output ±70 mA Input Capacitance, S1, S0 Pins 6, 7 4 pF AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted) Input Frequency, crystal input See table on page 2 5 27 MHz Input Frequency, clock input See table on page 2 2 50 MHz Output Frequency VDD = 4.5 to 5.5V 14 160 MHz Output Frequency VDD = 3.0 to 3.6V 14 100 MHz Output Clock Rise Time 0.8 to 2.0V 1 ns Output Clock Fall Time 2.0 to 0.8V 1 ns Output Clock Duty Cycle at VDD/2 45 49 to 51 55 % Absolute Clock Period Jitter Deviation from mean ±120 ps One Sigma Clock Period Jitter 50 ps Electrical Specifications |
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