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ICS512 数据表(PDF) 4 Page - Integrated Circuit Systems |
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ICS512 数据表(HTML) 4 Page - Integrated Circuit Systems |
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4 / 4 page ![]() ICS512 LOCO™ PLL Clock Multiplier MDS 512 C 4 Revision 061900 Printed 11/13/00 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Ordering Information Part/Order Number Marking Package Temperature ICS512M ICS512M 8 pin SOIC 0 to 70 °C ICS512MT ICS512M 8 pin SOIC on tape and reel 0 to 70 °C ICS512MI ICS512I 8 pin SOIC -40 to +85 °C ICS512MIT ICS512I 8 pin SOIC on tape and reel -40 to +85 °C External Components / Crystal Selection The ICS512 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS512 to minimize lead inductance. No external power supply filtering is required for this device. A 33 Ω terminating resistor can be used next to the CLK and REF pins. The total on-chip capacitance is approximately 15 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with a specified load capacitance greater than 15 pF, crystal capacitors should be connected from each of the pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps should be = (CL-15)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). LOCO is a trademark of ICS Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC 95.) B D EH e A1 C A h x 45° L INDEX AREA 12 8 pin SOIC Inch hes Millim meters Symbol Min Max Min Max A 0.0532 0.0688 1.35 1.75 A1 0.0040 0.0098 0.10 0.24 B 0.0130 0.0200 0.33 0.51 C 0.0075 0.0098 0.19 0.24 D 0.1890 0.1968 4.80 5.00 E 0.1497 0.1574 3.80 4.00 e .050 BSSC 1.27 BSSC H 0.2284 0.2440 5.80 6.20 h 0.0099 0.0195 0.25 0.50 L 0.0160 0.0500 0.41 1.27 |
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