ICS551

1 to 4 Clock Buffer

MDS 551 B

3

Revision 091200

Printed 11/14/00

Integrated Circuit Systems, Inc.•525 Race Street•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax

PRELIMINARY INFORMATION

Electrical Specifications

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged

exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.

2. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock generators.

3. With external series resistor of 33

Ω positioned close to each output pin.

Parameter

Conditions

Minimum

Typical

Maximum

Units

ABSOLUTE MAXIMUM RATINGS (note 1)

ABSOLUTE MAXIMUM RATINGS (note 1)

Supply voltage, VDD

Referenced to GND

7

V

Inputs and Clock Outputs

Referenced to GND

-0.5

VDD+0.5

V

Ambient Operating Temperature

0

70

°C

Soldering Temperature

Max of 20 seconds

260

°C

Storage temperature

-65

150

°C

DC CHARACTERISTICS

Operating Voltage, VDD

3

5.5

V

Input High Voltage, VIH, IN

Clock input

VDD/2 + 1

VDD/2

V

Input Low Voltage, VIL, In

Clock input

VDD/2

VDD/2 - 1

V

Input High Voltage, VIH, OE

2

V

Input Low Voltage, VIL, OE

0.8

V

Output High Voltage, VOH, 5V

IOH=-25mA

2.4

V

Output Low Voltage, VOL, 5V

IOL=25mA

0.4

V

Output High Voltage, VOH, CMOS level

IOH=-8mA

VDD-0.4

V

Operating Supply Current, IDD, 3.3V

No load, 135 MHz

18

mA

Short Circuit Current, 3.3 V

Each output

±50

mA

Internal pull-up resistor

All inputs

200

k

Ω

AC CHARACTERISTICS

Input Frequency

0

160

MHz

Output Frequency, 3.3 V

15 pF load. Note 3.

160

MHz

Output Frequency, 5 V

15 pF load. Note 3.

135

MHz

Output Clock Rise Time

0.8 to 2.0V

1.5

ns

Output Clock Fall Time

2.0 to 0.8V

1.5

ns

Propagation Delay

At 3.3 V

2

4

8

ns

At 5.0 V

1.5

3

6

ns

Output to output skew

Rising edges at VDD/2

250

ps