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ICS581-01 数据表(PDF) 1 Page - Integrated Circuit Systems |
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ICS581-01 数据表(HTML) 1 Page - Integrated Circuit Systems |
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1 / 6 page ![]() OE0 ICS581-01, -02 Zero-Delay Glitch-Free Clock Multiplexer MDS 581-01, 581-02 A 1 Revision 041100 Printed 11/14/00 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com The ICS581-01 and ICS581-02 are glitch free, Phase Locked Loop (PLL) based clock multiplexers (mux) with zero delay from input to output. They each have 4 low skew outputs which can be configured as a single output, 3 outputs or 4 outputs. The ICS581-01 allows user control over the mux switching. The ICS581-02 has automatic switching between the 2 clock inputs. The ICS581-01 and -02 are members of the ICS Clock Blocks™ family of clock generation, synchronization, and distribution devices. For a non-PLL based clock mux, see the ICS580-01. Block Diagrams Description Features • Tiny 16 pin TSSOP package • No short pulses or glitches on output. Operates to 200 MHz • User controlled (ICS581-01) or automatic, timed (ICS581-02) switch • Low skew outputs • Ideal for systems with backup or redundant clocks • Zero delay, input to output • 50% output duty cycle allows duty cycle correction • Spread Smart™ technology works with spread spectrum parts PLL 1 0 INA INB SELA FBIN OE0 OE1 S0, S1 CLK1 CLK2 CLK3 CLK4 OE1 ICS581-01 PLL 1 0 INA INB FBIN OE0 OE1 S0, S1 CLK1 CLK2 CLK3 CLK4 OE1 1 0 ÷48 ÷3 IN Transition Detector DIV NO_INA OE0 ICS581-02 2 External Feedback External Feedback 2 |
类似零件编号 - ICS581-01 |
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类似说明 - ICS581-01 |
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