ICS650-21

System Peripheral Clock Source

MDS 650-21 A

2

Revision 010301

Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com

PRELIMINARY INFORMATION

Pin #

Name

Type

Description

1

USEL

I

UCLK Select pin. Determines frequency of USB clock per table above.

2

X2

XO

Crystal connection. Connect to parallel mode 25 MHz crystal. Leave open for clock.

3

X1/ICLK

XI

Crystal connection. Connect to parallel mode 25 MHz crystal, or clock.

4

VDD

P

Connect to VDD. Must be same value as other VDD. Decouple with pin 6.

5

VDD

P

Connect to VDD. Must be same value as other VDD.

6

GND

P

Connect to ground.

7

UCLK

O

USB clock output per table above.

8

20M

O

Fixed 20 MHz output for Ethernet.

9

ACLK

O

AC97 Audio clock output per table above.

10

25M

O

Fixed 25 MHz reference output for Fast Ethernet.

11

OE

I

Output Enable. Tri-states all outputs when low.

12

PCLK1

O

PCLK output number 1 per table above.

13

OFF/14.318M

O

14.31818 MHz clock output only when ASEL=VDD.

14

GND

P

Connect to ground.

15

ASEL

I

ACLK Select pin. Determines frequency of Audio clock per table above.

16

VDD

P

Connect to VDD. Must be same value as other VDD. Decouple with pin 14.

17

PCLK3

O

PCLK output number 3 per table above.

18

PCLK2

O

PCLK output number 2 per table above.

19

PSEL0

I

Processor Select pin #0. Determines frequencies on PCLKs 1-3 per table above.

20

PSEL1

I

Processor Select pin #1. Determines frequencies on PCLKs 1-3 per table above.

Pin Descriptions

Key: I = Input; XO/XI = crystal connections; O = output; P = power supply connection

1

16

2

3

4

15

14

13

VDD

UCLK

X2

VDD

20 pin (150 mil) SSOP

5

6

7

8

12

11

10

9

25M

PSEL0

X1/ICLK

USEL

PCLK2

PSEL1

PCLK3

PCLK1

OE

ACLK

20M

18

17

19

20

GND

VDD

OFF/14.318M

GND

ASEL

Processor Clock (MHz)

ASEL

ACLK

0

49.152

M

24.576

1

14.318

USEL

UCLK

0

12

M

24

1

48

Audio Clock (MHz)

USB Clock (MHz)

0 = connect directly to ground, 1 = connect directly

to VDD, M=leave unconnected (floating)

Pin Assignment

PSEL1

PSEL0

PCLK1

PCLK2,3

0

0

25.00

50.00

0

M

37.5

75.00

0

1

66.66

133.33

M

0

40.00

80.00

M

M

33.3334

66.6667

M

1

20.00

40.00

1

0

20.00

33.3334

1

M

20.00

66.6667

1

1

50

100