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ICS8530 数据表(PDF) 7 Page - Integrated Circuit Systems |
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ICS8530 数据表(HTML) 7 Page - Integrated Circuit Systems |
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7 / 12 page ![]() ICS8530DY www.icst.com/products/hiperclocks.html REV. C AUGUST 7, 2001 7 Integrated Circuit Systems, Inc. ICS8530 LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-2.5V LVPECL FANOUT BUFFER APPLICATION INFORMATION WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS Figure 8 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF ~ V CC/2 is generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of R1 and R2 might need to be adjusted to position the V_REF in the center of the input voltage swing. For example, if the input clock swing is only 2.5V and V CC = 3.3V, V_REF should be 1.25V and R2/R1 = 0.609. FIGURE 8 - SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT R2 1K V CC CLK_IN + - R1 1K C1 0.1uF V_REF |
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