ICS85311AM

www.icst.com/products/hiperclocks.html

REV. A JUNE 29, 2001

9

Integrated

Circuit

Systems, Inc.

ICS85311

Low Skew, 1-to-2

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer

This section provides information on power dissipation and junction temperature for the ICS85311.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation of the ICS85311 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for V

NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

• Power (core) = V

• Power (outputs) = 30.2mW/Loaded Output pair

If all outputs are loaded, the total power is 2 x 30.2mW = 60.4mW

Total Power (3.465V, with all outputs switching) = 86.6mW + 60.4mW = 147mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the

In order to determine if the junction temperature is below 125°C, the appropriate junction-to-ambient thermal

resistance θ

feet per minute and a multi-layer board, the appropriate value is 103.3°C/W per the table below:

Tj = θ

temperature. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:

70°C + 0.147W * 103.3°C/W = 85.2°C. This is well below the limit of 125°C.

This calculation is only an example, and the Tj will obviously vary depending on the number of outputs that are

loaded, supply voltage, air flow, and the type of board (single layer or multi-layer).

Thermal Resistance q

JA

for 8-pin SOIC, Forced Convection

q

JA

by Velocity (Linear Feet per Minute)

0

200

500

Single-Layer PCB, JEDEC Standard Test Boards 153.3°C/W

128.5°C/W

115.5°C/W

Multi-Layer PCB, JEDEC Standard Test Boards

112.7°C/W

103.3°C/W

97.1°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.